1. Field of the Invention
This invention relates generally to processors and buses, and more particularly, to a method and apparatus for controlling the operational characteristics of individual bus buffer groups.
2. Description of the Related Art
Referring to FIG. 1, a bus 10 transports logical signals between devices of a computer that include a processor 12, a memory 14, and an input/output device 16. The processor 12 couples to the bus lines 18 by means of one or more bus buffers 20. By adjusting the operational characteristics of the bus buffer 20, the interaction between the processor 12 and the bus 10 can be optimized. The operational characteristics include slew rate, output impedance, and input impedance. The operational characteristics of the bus buffer 20 to a large extent determine the quality and timing of signal transmission and reception to and from the device that connects to the bus 10 through the bus buffer 20, i.e., the processor 12.
In high speed computers, one important goal is to tune the operational characteristics of the bus buffer 20 so that the performance of the bus 10 is optimized. The optimal settings for the operational characteristics of the bus buffer 20 depend on external properties such as bus topology, bus loading, and signal quality requirements. Improperly matching the operational characteristics of the bus buffer 20 to these external properties can result in undesirable signal reflections, power wastage, signal overshoots, and signal undershoots. Bus performance can be maintained by changing the operational characteristics of the bus buffer 20 to match both the properties of the lines 18 and the properties of the other devices 14, 16, 22 attached to the bus 10.
Subsequent modifications of the bus topology and loading can necessitate changing the operational characteristics of the bus buffer 20. For example, adding a device 22 to the bus modifies the bus topology and not changing the impedance of the bus buffer 20 to match the modification may result in undesirable signal reflections. If the modifications occur at the manufacturing level, changing the operational characteristics to match the modifications can demand the lengthy and costly process of constructing and testing new prototypes for the bus buffer 20. If the modifications are made by an end user, e.g., adding the device 22 to the bus 10, it may not be possible to change the operational characteristics of the bus buffer 20 to maintain performance levels. Since later modifications to bus topology and loading are common, the need to be able subsequently change the operational characteristics of the bus buffer 20 is endemic.
In prior art devices, processor control has been used to maintain bus performance in situations where user modifications or modifications during operation are possible. Bus controllers of the prior art have, however, certain deficiencies. First, a bus buffer 20 includes several groups that connect to separate bus lines. A bus may include groups for address signals, data signals, clock signals and control signals. In many situations, the topology and/or loading of the separate bus groups is different or may evolve differently during operation. In such cases, optimal performance cannot be achieved by changing the operational characteristics of all bus groups together. Second, optimizing performance ordinarily demands that the operational characteristics of the bus buffer 20, i.e., slew rate, output impedance, and input impedance be separately adjustable. Third, prior art methods do not introduce sufficient flexibility into the operational characteristics of bus buffers to ensure that performance can be maintained following modifications by end users through software programs and/or a basic input/output system (BIOS). As processors operate at higher frequencies and incorporate more complicated I/O topologies, problems of reflections, overshoots, undershoots, and wasted power, may be insufficiently addressed by the prior art methods for adjusting the operational characteristics of the bus buffer 20.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.